The BrainScaleS-1 is an accelerated spiking neuromorphic system integrating 200k adaptive exponential integrate-and-fire neurons, 43M plastic synapses, and event routing on a silicon wafer substrate. It enables fast emulation of complex neural dynamics and exploration of STDP-type synaptic plasticity.
Developed By:

The BrainScaleS-1 accelerated neuromorphic system is an wafer-scale integrated circuit architecture for emulating biologically-inspired spiking neural networks.
It was developed by researchers at the Heidelberg University and collaborators.
Key features of the BrainScaleS-1 system include:
System Architecture
- 20 wafers comprising 384 ASICs interconnected by a configurable circuit-switched event routing network on a silicon wafer
- Every ASIC integrate a custom analog core with 512 neuron circuits, 112k plastic synapses, floating-gate-based analog parameter storage, STDP-type long-term and STP-type short-term plasticity and an event routing network
Neural and Synapse Circuits
- Implements the Adaptive Exponential Integrate-and-Fire (AdEx) neuron model with individually configurable model parameters
- On-chip synapse correlation and plasticity measurement enable programmable spike-timing dependent plasticity
Software and Experiment Control
- BrainScaleS OS provides a full software stack including:
- High-level PyNN-based experiment interfaces
- C++ core libraries for configuration, calibration and control
- Mapping and routing tools to translate neural models onto hardware
- Allows both novice and expert usage with varying levels of abstraction
- Supports batch-mode and hybrid-mode experiments (chip-in-the-loop)
Applications and Experiments
- Accelerated (10,000-fold compared to biological real time) emulation of complex spiking neuron dynamics
- Exploration of synaptic plasticity models and critical network dynamics at biological timescales
The accelerated operation and flexible architecture facilitate applications in computational neuroscience research.
Related publications
Date | Title | Authors | Venue/Source |
---|---|---|---|
September 2023 | From clean room to machine room: commissioning of the first-generation BrainScaleS wafer-scale neuromorphic system | Hartmut Schmidt, José Montes, Andreas Grübl, Maurice Güttler, Dan Husmann, Joscha Ilmberger, Jakob Kaiser, Christian Mauch, Eric Müller, Lars Sterzenbach, Johannes Schemmel and Sebastian Schmitt | Neuromorphic Computing and Engineering |
May 2022 | The operating system of the neuromorphic BrainScaleS-1 system | Eric Müller, Sebastian Schmitt, Christian Mauch, Sebastian Billaudelle, Andreas Grübl, Maurice Güttler, Dan Husmann, Joscha Ilmberger, Sebastian Jeltsch, Jakob Kaiser, Johann Klähn, Mitja Kleider, Christoph Koke, José Montes, Paul Müller, Johannes Partzsch, Felix Passenberg, Hartmut Schmidt, Bernhard Vogginger, Jonas Weidner, Christian Mayr, Johannes Schemmel | Neurocomputing |
March 2016 | Neuromorphic Computer Coming Online | No author listed | Press Release by Heidelberg University |
June 2010 | A wafer-scale neuromorphic hardware system for large-scale neural modeling | Johannes Schemmel, Daniel Brüderle, Andreas Grübl, Matthias Hock, Karlheinz Meier, Sebastian Millner | 2010 IEEE International Symposium on Circuits and Systems (ISCAS) |
June 2008 | Wafer-scale integration of analog neural networks | Johannes Schemmel, Johannes Fieres, Karlheinz Meier | 2008 IEEE International Joint Conference on Neural Networks (IJCNN) |
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