ROLLS - INI

Learn about INI's neuromorphic hardware: ROLLS

ROLLS At A Glance

Release Year: 2015
Status: End Of Life
Chip Type: Mixed-signal
Software: Custom Python
Applications: Research
Neurons: 256
Synapses: 64000
On-Chip Learning: true
Power: ~5 mW

ROLLS is a reconfigurable neuromorphic chip with 256 silicon neurons and 128K plastic synapses that implements spike-timing learning rules. It allows emulation of neural systems with adaptive behaviors using analog neuron/synapse circuits with added digital configuration logic for flexibility.

Developed By:

INI

The ROLLS chip implements key requirements for online learning and adaptive behavior in neuromorphic systems, with highly flexible digital configuration options.

Overview

  • Presented as a “Reconfigurable On-line Learning Spiking Neuromorphic Processor”
  • 256 silicon neurons, 128K plastic synapses, 256K programmable synapses
  • Mixed-signal analog/digital implementation
  • 180nm CMOS process, 51.4 mm2 die area
  • Modeling of neural systems that adapt in real-time through on-chip learning

Silicon Neurons

  • Implement adaptive exponential Integrate-and-Fire (I&F) model
  • Exhibit various spiking behaviors (frequency adaptation, refractory period, threshold adaptation, bursting)
  • Highly configurable through 13 tunable bias parameters
  • Low mismatch between neurons (9.4% avg)
  • On-chip learning circuits to evaluate spike-timing-based plasticity rules

Synapses

  • Two core arrays:
    • Long-term plasticity (LTP) synapses with bi-stable weights using drift-diffusion mechanism
    • Short-term plasticity (STP) synapses with 4-level programmable weights and short-term depression
  • LTP array models NMDA receptors with longer time constants
  • STP array models AMPA/GABA receptors with shorter time constants
  • Sparse digital logic for memory and configuration in every synapse
  • Digital configuration of synapse types and connectivity

Architecture

  • Virtual “diffuser” synapses to combine signals from groups of synapses
  • Synapse demultiplexing to allow flexible neuron-synapse mapping
  • Asynchronous peripheral digital circuits for input/output
  • Bias generator for tuning analog parameters
  • ADC readout circuit for monitoring internal signals

Applications

  • Hardware attractor networks to model working memory and decision making
  • Real-time image classification demonstration with spiking vision sensor
DateTitleAuthorsVenue/Source
April 2015A reconfigurable on-line learning spiking neuromorphic processor comprising 256 neurons and 128K synapsesNing Qiao, Hesham Mostafa, Federico Corradi, Marc Osswald, Fabio Stefanini, Dora Sumislawska, Giacomo IndiveriFrontiers of Neuroscience
Spiking Neurons: A Digital Hardware Implementation

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Learn how to model Leaky Integrate and Fire (LIF) neurons in digital hardware. Understand spike communication, synapse integration, and more for hardware implementation.

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Stay up-to-date with cutting-edge digital hardware designs for neuromorphic applications. Explore recent research on power-efficient event-driven spiking neural networks and state-of-the-art processors like TrueNorth and Loihi.