Spikey — Heidelberg University

Learn about Heidelberg University's neuromorphic hardware: Spikey

Spikey At A Glance

Release Year: 2006
Status: End Of Life
Chip Type: Mixed-signal
Software: PyNN.spikey
Applications: Edge processing, robotics
Neurons: 384
Synapses: 98k
Weight bits: 4 bits
On-Chip Learning: true
Power: ~1 W

The Spikey chip is an accelerated spiking neuromorphic system integrating 384 integrate-and-fire neurons, 98k plastic synapses, and event routing. It enables fast emulation of complex neural dynamics and exploration of STDP-type synaptic plasticity.

Developed By:

The Spikey accelerated neuromorphic system is an integrated circuit architecture for emulating biologically-inspired spiking neural networks.
It was developed by researchers at the Heidelberg University.
Key features of the Spikey system include:

System Architecture

  • Single-chip ASIC integrating a custom analog core with 384 neuron circuits, 98k plastic synapses, analog parameter storage, and an event routing network
  • Synapses support STDP-type long-term and STP-type short-term plasticity.

Neural and Synapse Circuits

  • Implements the Leaky Integrate-and-Fire (LIF) neuron model with individually configurable model parameters
  • On-chip synapse correlation and plasticity measurement enables programmable spike-timing dependent plasticity

Applications and Experiments

  • Accelerated (50,000–100,000-fold compared to biological real time) emulation of complex spiking neuron dynamics
  • Exploration of synaptic plasticity models and critical network dynamics at biological timescales

The accelerated operation and flexible architecture facilitate applications in computational neuroscience research.

DateTitleAuthorsVenue/Source
February 2013Six networks on a universal neuromorphic computing substrateThomas Pfeil, Andreas Grübl, Sebastian Jeltsch, Eric Müller, Paul Müller, Mihai A. Petrovici, Michael Schmuker, Daniel Brüderle, Johannes Schemmel, Karlheinz MeierFrontiers in Neuroscience (Neuromorphic Engineering)
July 2012Is a 4-bit synaptic weight resolution enough? – constraints on enabling spike-timing dependent plasticity in neuromorphic hardwareThomas Pfeil, Tobias C. Potjans, Sven Schrader, Wiebke Potjans, Johannes Schemmel, Markus Diesmann, Karlheinz MeierFrontiers in Neuroscience (Neuromorphic Engineering)
June 2009Establishing a Novel Modeling Tool: a Python-based Interface for a Neuromorphic Hardware SystemDaniel Brüderle, Eric Müller, Andrew Davison, Eilif Muller, Johannes Schemmel, Karlheinz MeierFrontiers Neuroinformatics
June 2007Modeling Synaptic Plasticity within Networks of Highly Accelerated I&F NeuronsJohannes Schemmel, Daniel Bruderle, Karlheinz Meier, Boris Ostendorf2007 IEEE International Symposium on Circuits and Systems (ISCAS)
July 2006Implementing Synaptic Plasticity in a VLSI Spiking Neural Network ModelJohannes Schemmel, Andreas Grübl, Karlheinz Meier, Eilif Mueller2006 IEEE International Joint Conference on Neural Network (IJCNN)

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